AMD engineers have officially confirmed the long-rumored codenames Medusa and Venice for upcoming Zen 6 processors during their session at the OCP Global Summit 2025. The confirmation appeared on an OpenSIL roadmap slide presented by Rai Kapoor, AMD Fellow and Chief Firmware Architect, and Srini Naravana, AMD Vice President of Boot Firmware.
The session, titled “Building Open Firmware for Open Platforms: OpenSIL & The Road to Full Silicon Transparency,” outlined AMD’s plan to replace its proprietary AGESA firmware with OpenSIL, an open-source silicon initialization framework designed to improve transparency, security, and customization.
The roadmap includes two milestones for AMD's open firmware rollout: 6th Gen EPYC “Venice” will be the first production-grade server platform to ship with OpenSIL firmware, scheduled for 2026 with code release about one quarter later. Ryzen Zen 6 “Medusa” will follow as the next client platform, with its open-source release planned for the first half of 2027.
As far as we can tell, this presentation marks the first official acknowledgment of the Medusa codename by AMD engineers, confirming previous leaks that tied it to Zen 6 desktop and mobile CPUs. The Medusa family is expected to appear in configurations such as Medusa Ridge for desktop and Medusa Point for mobile. Early information suggests higher core and cache counts than current Ryzen models and improved memory performance. AMD is also expected to maintain AM5 socket compatibility for one more generation, though this has not been confirmed.
As AMD moves toward open-source transparency and next-generation silicon efficiency, thermal stability becomes more critical than ever. The increased core density and cache structure in Zen 6 architectures demand superior heat dissipation to sustain performance.
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